The present invention relates to pulse or function generators, and more particularly to a direct digital synthesis (DDS) pulse generator architecture that makes it easy to independently control the period and pulse width as well as pulse edge rise and fall times.
Referring to FIG. 1, in the most obvious implementation of DDS architecture for pulse generation, changing the period of a pulse also causes the edge positions as well as the rise and fall times to change, whereas it is desirable to vary just the period or just the edge positions. In classical DDS circuits the frequency is set by repeatedly adding one value, which may be thought of as a phase increment, to an accumulator, sometimes referred to as a phase accumulator. The value in the accumulator may be thought of as a phase angle. The accumulator is built using modulo arithmetic so that phases greater than 360 degrees automatically have 360 degrees removed. The accumulator is typically implemented as a fixed length binary counter so that the addition is automatically modulo a power of two. The most significant bits of the accumulator are used to address a lookup table, since generally the accumulator has more bits than a following digital-to-analog converter (DAC). The lookup table contains a desired waveform. When making a pulse, the lookup table is loaded with a digitized version of the pulse to be generated, as shown in FIG. 2. The output of the lookup table is sent to the DAC. Finally the output of the DAC is filtered to remove aliases and is amplified to a desired output level.
The following table illustrates the operation of a conventional DDS when a sine wave is being generated. The modulo is 28=256 and the phase increment is 25.
STEPACCUMULATOR VALUELOOKUP OUTPUT 000 12573 250120 375123 410081 51259 6150−66 7175−118 8200−126 9225−8910250−1911195712441121369127149494151192816144−4917169−10918194−12819219−10120244−38...
The frequency of the pulse signal is a function of the phase increment, the modulo value and the sample rate, i.e., Frequency=1/Period where Period=Sample_Rate*Modulo/increment. In classical DDS circuits the modulo values and sample rate are usually fixed. The frequency is varied by changing the phase increment value. The disadvantage of changing the phase increment is that this also changes the edge positions and edge rise and fall times. In order to change just the period it is necessary to reload the lookup table each time the phase increment is changed. Reloading the lookup table is a slow operation, and it usually requires stopping the signal generator.
What is desired is a pulse or function generator that easily independently controls the period and pulse width of generated pulses as well as the pulse edge rise and fall times.